Semiconductor chips are generally manufactured through a wafer process, known as a “front-end process,” where wirings are formed on a circular silicon wafer of 200 mm to 300 mm in diameter, and a back-end process where the wafer is diced into individual chips. The silicon wafer, on which patterns are formed for the many semiconductor chips to be created from it, is diced in such a way that it is cut in one direction with a diamond blade, and then turned by 90 degrees and cut again in one direction, producing rectangular cuttings that become semiconductor chips.
The semiconductor chips that were cut from the wafer in the dicing process go through an assembly process, known as a “back-end process,” involving mounting, wire-bonding, molding, etc., and an inspection process, and are then shipped as semiconductor packages. Semiconductor packages include the lead insertion types such as DIP (dual inline package), SIP (single inline package) and ZIP (zigzag inline package), as well as the surface-mounting types such as SOP (small outline package), QFP (quad flat package), QFN (quad flat no-lead package), BGA (ball grid array) and LGA (land grid array), where the surface-mounting types having smaller area are the current mainstream. A number of semiconductor packages have been devised to date, but semiconductor packages generally have a rectangular shape.
Semiconductor packages are subject to interfacial micro-delamination because shearing force is applied to the interface of different materials due to difference in their thermal expansion coefficients. When heat is applied to a semiconductor package, the moisture absorbed by the resin is ejected into micro-delamination areas as water vapor, and the pressures in the delamination areas increase and the package expands as a result. With a rectangular semiconductor package, this stress (thermal stress) due to expansion concentrates at the corners and therefore delamination tends to occur at the corners. Accordingly, rectangular semiconductor packages are designed with lower electrode and wiring density at the corners to reduce the amount of heat generating at the corners, as described in Patent Literature 1; however, it is difficult to completely prevent thermal-stress-induced delamination at the corners of CPUs, power semiconductors, and other packages generating a lot of heat, or in-vehicle semiconductor packages whose temperature rises to 60° C. or so in summer.